Fan-Out Wafer Level Packaging (FOWLP) is a relatively new advanced packaging process that is gaining rapid widespread use in portable devices such as smart phones because of small form factor enabled by FOWLP. It offers the advantages of true heterogeneous integration of a diversity of dies, including high performance electronics, tight pitch interconnects and passives with a short turn-around scalable manufacturing process. So far FOWLP has been limited to rigid packaging. FlexTrateTM uses biocompatible polydimethylsiloxane (PDMS) as the packaging mold compound in the FOWLP, which offers significant advantage in reducing die shift, and wafer warpage compared to conventional epoxy-based molding compounds (EMC) due to its’ lower glass transition temperature and Young’s modulus values. CHIPS FlexTrateTM platform is also a key enabler of heterogonous integration on flexible substrates, where heterogeneous dies are integrated close to each other on a flexible substrate and interconnect them using wafer level processes. Our approach blends the best in silicon processing, packaging and flexible electronics developments to yield a very versatile and adaptable heterogeneous physically flexible platform. In adapting the FlexTrateTM process, special consideration has been given the problems faced by rigid FOWLP – die shift and cracking. Our innovative solution lies in the proper choice of material for molding, which is not only biocompatible, but also can be processed at low temperature to tackle a major issue in FOWLP mold-first approach, namely die shift problem. This flexible FOWLP methodology doesn’t require microbump formation, underfill, and wire bonding processes. Therefore, the new flexible integration scheme is very simple and elegant solution compared to the conventional flexible device integration/packaging industrially used in recent microelectronics packaging manufacturing.
Example of FlextrateTM around a pen